Abingdon United W: Premier League South Squad & Achievements

Overview of Abingdon United (w)

Abingdon United (w) is a prominent women’s football team based in the UK, competing in the regional league. Founded in 1985, the team is managed by Coach Jane Smith. Known for their strategic gameplay and strong team dynamics, they are a formidable force in their league.

Team History and Achievements

Since its inception, Abingdon United (w) has been a competitive team, securing several titles including the Regional League Championship in 1998 and 2005. The club has consistently finished in the top half of the league standings over the past decade, with notable seasons highlighting their offensive prowess.

Current Squad and Key Players

The current squad features standout players such as striker Emily Johnson and midfielder Sarah Lee. Emily Johnson is known for her goal-scoring ability, while Sarah Lee excels in playmaking and ball distribution. These key players have significantly contributed to the team’s recent successes.

Team Playing Style and Tactics

Abingdon United (w) typically employs a 4-3-3 formation, focusing on high pressing and quick transitions. Their strengths lie in their attacking strategies and cohesive midfield play. However, they occasionally struggle with defensive organization against counter-attacks.

Interesting Facts and Unique Traits

The team is affectionately nicknamed “The Red Ladies,” reflecting their vibrant red kit. They boast a passionate fanbase known for their enthusiastic support at home games. Rivalries with nearby clubs add an extra layer of excitement to their matches.

Lists & Rankings of Players, Stats, or Performance Metrics

• Top Scorer: Emily Johnson ✅
• Average Goals per Match: 1.8 🎰
• Possession Percentage: 58% 💡

Comparisons with Other Teams in the League or Division

In comparison to other teams in the division, Abingdon United (w) ranks highly in terms of goals scored per match but slightly lower in defensive metrics. Their aggressive playing style sets them apart from more defensively oriented teams.

Case Studies or Notable Matches

A breakthrough game was their victory against rivals Oxford City FC last season, where they won 3-1. This match showcased their tactical flexibility and resilience under pressure.

Tables Summarizing Team Stats, Recent Form, Head-to-Head Records, or Odds

*Odds are illustrative only.













 

 

 

 

 

Stat Category	Last Season	This Season (so far)
Total Goals Scored	45	20
Total Goals Conceded	30	15
Last Five Matches Result (W/D/L)	w-w-d-l-w
Odds for Next Match Win/Loss Drawn*		(1.75/3.50/4.00)	(1.80/3.60/4.20)	(1.85/3.70/4.30)	(1.90/3.80/4.40)	(1.95/3.90/4.50)

Tips & Recommendations for Analyzing the Team or Betting Insights 💡 Advice Blocks

• Analyze player performance trends to identify potential match-winners.
• Maintain awareness of recent form shifts that could influence game outcomes.
• Leverage head-to-head records to gauge rivalry impacts on upcoming matches.

Famous Quotes about Abingdon United (w)

”

“Abingdon United’s tenacity on the field is unmatched.” – Local Sports Analyst Jane Doe.

Pros & Cons of the Team’s Current Form or Performance ✅❌ Lists

”

• Prominent Pros:: High scoring capability ✅ Strong midfield presence ✅ Effective counterattacks ❌ Some vulnerability at full-back positions ❌ Occasional lapses in defensive coordination ❌

  Betting Analysis Step-by-Step Guide: Understanding Abingdon United (w)’s Tactics & Betting Potential 📊 How-To Guides📊📊📊📊📊📊📊📊📊📊📊📊💡💡💡💡💡💡💡💡💡💡

  “
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  1. Analyze historical performance data to identify patterns.
  2. Evaluate current squad depth and injuries.
  3. Cross-reference odds with recent form.
  4. Familiarize yourself with key player matchups.
  5. Situate betting decisions within broader league trends.
  6. Maintain adaptability based on pre-match analyses.LJU-COMPETITION/ljubljana2020.github.io/_REPO/GITHUB/docs/content/github/collaborating-with-pull-requests/proposing-changes-to-your-work-with-pull-requests/about-pull-request-reviews.md
     —
     title: About pull request reviews
     intro: ‘Pull request reviews allow you to provide feedback on proposed changes before they are merged.’
     redirect_from:
     – /articles/about-pull-request-reviews
     versions:
     fpt: ‘*’
     topics:
     – Pull requests
     shortTitle: About pull request reviews
     —
     ## About pull request reviews

     Pull request reviews allow you to provide feedback on proposed changes before they are merged.

     You can review changes as part of your work flow by:

     * Leaving inline comments on changed lines.
     * Requesting changes that must be made before merging.
     * Approving changes if they’re ready to be merged.

     {% data reusables.pull_requests.request_review %} {% data reusables.pull_requests.request-changes %}

     ## About review permissions

     Review permissions determine who can approve or request changes to your pull requests.

     {% data reusables.pull_requests.about-review-permissions %}
     {% data reusables.pull_requests.review-permissions-pr-template %}
     {% data reusables.pull_requests.review-permissions-org %}

     ## About code owners

     Code owners are people who own specific parts of your code base.

     When you assign someone as a code owner for a file or directory using a [CODEOWNERS](https://help.github.com/articles/about-codeowners/) file,

     * They receive notifications when someone opens a pull request that modifies any file within that directory.
     * They’re automatically requested as reviewers when someone opens a pull request that modifies any file within that directory.

     For more information about CODEOWNERS files see “[About CODEOWNERS files](https://help.github.com/articles/about-codeowners-files).”

     ## About draft pull requests

     Draft pull requests let you share work that isn’t ready for review yet.

     {% data reusables.pull_requests.draft-prs-beta-note %}
     {% data reusables.pull_requests.draft-prs-about %}

     For more information see “[Creating a draft pull request](/articles/creating-a-draft-pull-request)” and “[About draft pull requests](/articles/about-draft-pull-requests).”

     ## About merging requirements

     Merging requirements determine whether anyone can merge your pull requests without approval.

     You can set these requirements so you don’t accidentally merge changes into your default branch without reviewing them first.

     {% data reusables.pull_requests.merge-requirements-about %}

     For more information see “[About merging pull requests](/articles/about-merging-pull-requests).”

     ## Further reading

     * “[Understanding GitHub permissions](https://help.github.com/articles/types-of-github-permissions)”
     * “[Creating a draft pull request](https://help.github.com/articles/creating-a-draft-pull-request)”
     * “[About draft pull requests](https://help.github.com/articles/about-draft-pull-requests)”
     * “[About CODEOWNERS files](https://help.github.com/articles/about-codeowners-files)”
     er=0,
     &g_atm128_timer_cntl_reg_map__size_9=0,
     &g_atm128_timer_cntl_reg_map__base_10=0,
     &g_atm128_timer_cntl_reg_map__bit_10=0,
     &g_atm128_timer_cntl_reg_map__pinmask_10=0,
     &g_atm128_timer_cntl_reg_map__port_10=-1,
     &g_atm128_timer_cntl_reg_map__pin_10=-1,
     &g_atm128_timer_cntl_reg_map__count_10=0,
     &g_atm128_timer_cntl_reg_map__timer_10=-1,
     &g_atm128_timer_cntl_reg_map__event_mask_10=0,
     &g_atm128_timer_cntl_reg_map__size_10=0,
     &g_atm128_tcc_msb_port_pin[]={
     AT91C_PIO_PB26A_TCC0_OVF_bp ,
     AT91C_PIO_PB27A_TCC0_MCRA_bp ,
     AT91C_PIO_PA21A_TCC0_MCRB_bp ,
     AT91C_PIO_PA22A_TCC0_MCRC_bp ,
     AT91C_PIO_PA23A_TCC0_MCRD_bp ,
     AT91C_PIO_PA24A_TCC0_SWSR_bp ,
     AT91C_PIO_PA25A_TCC0_CV_bp },
     &g_atm128_tcc_msb_ioport[]={
     PIN_PB26 ,
     PIN_PB27 ,
     PIN_PA21 ,
     PIN_PA22 ,
     PIN_PA23 ,
     PIN_PA24 ,
     PIN_PA25 },
     &tcc_master[ TCC_MASTER_TC ] = {

     .tcc_ioport = PIN_PB26 | PIN_PB27 | PIN_PA21 | PIN_PA22 | PIN_PA23 | PIN_PA24 | PIN_PA25 ,
     .tcc_mux = ATMEL_ATMega644P_MUX_A ,
     .tcc_ioport_mask = ATMEL_ATMega644P_PINMASK( PB ) | ATMEL_ATMega644P_PINMASK( PA ) ,
     .tcc_ioport_index = ATMEL_ATMega644P_PORTB_INDEX | ATMEL_ATMega644P_PORTA_INDEX ,
     .tcc_pinmask = ATMEL_ATMega644P_PINMASK( PB26 ) | ATMEL_ATMega644P_PINMASK( PB27 ) | ATMEL_ATMega644P_PINMASK( PA21 ) | ATMEL_ATMega644P_PINMASK( PA22 ) | ATMEL_ATMega644P_PINMASK( PA23 ) | ATMEL_ATMega644P_PINMASK( PA24 ) | ATMEL_ATMega644P_PINMASK( PA25 ),
     .tcc_pin = { AT91C_PIO_PB26A_TCC0_OVF_bp , AT91C_PIO_PB27A_TCC0_MCRA_bp , AT91C_PIO_PA21A_TCC0_MCRB_bp , AT91C_PIO_PA22A_TCC0_MCRC_bp , AT91C_PIO_PA23A_TCC0_MCRD_bp , AT91C_PIO_PA24A_TCC0_SWSR_bp , AT91C_PIO_PA25A_TCC0_CV_bp } ,

     .tc_ccrb_mask = TCCR_B_MASK |
     TCCR_B_WGM13_bit |
     TCCR_B_WGM12_bit |
     TCCR_B_COM1_bit |
     TCCR_B_COMO_bit |
     TCCR_B_PWMO_bit |
     TCCR_B_FOCO_bit ,

     .tc_ccra_mask = TCCR_A_MASK |
     TCCR_A_WGMA_bit |
     TCCR_A_WGMA_inv_bit |
     TCCR_A_COMPA_bit |
     TCCR_A_COMPA_inv_bit |
     TCCR_A_FOCO_bit ,

     .tc_count = TC_COUNTER_SIZE_8_BITS ,

     .tc_ctrla_mask = TC_CTRLA_CLKSEL_MASK |

     #ifdef __AVR_HAVE_TC_CLKSEL_DIV1024_gc__
     TC_CLKSEL_DIV1024_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV256_gc__
     TC_CLKSEL_DIV256_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV64_gc__
     TC_CLKSEL_DIV64_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV16_gc__
     TC_CLKSEL_DIV16_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV8_gc__
     TC_CLKSEL_DIV8_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV4_gc__
     TC_CLKSEL_DIV4_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV3_gc__
     TC_CLKSEL_DIV3_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV1024_X5_gc__
     TC_CLKSEL_DIV1024_X5_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV256_X5_gc__
     TC_CLKSEL_DIV256_X5_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV64_X5_gc__
     TC_CLKSEL_DIV64_X5_gc |

     #endif
     #ifdef __AVR_HAVE_TC_CLKSEL_DIV16_X5_gc__
     TC_CLKSEL_DIV16_X5_gc |

     #endif

     #ifndef AVR32_USBB_CH_NUM_MAX_CHANNELS
     #define AVR32_USBB_CH_NUM_MAX_CHANNELS ((uint32_t)7)
     #else /* AVR32_USBB_CH_NUM_MAX_CHANNELS */
     #define AVR32_USBB_CH_NUM_MAX_CHANNELS AVR32_USBB_CH_NUM_MAX_CHANNELS
     #endif /* AVR32_USBB_CH_NUM_MAX_CHANNELS */
     #ifndef AVR32_USART_RXD_OFFSET_ADDRESS
     #define AVR32_USART_RXD_OFFSET_ADDRESS ((uint32_t)17)
     #else /* AVR32_USART_RXD_OFFSET_ADDRESS */
     #define AVR32_USART_RXD_OFFSET_ADDRESS AVR32_USART_RXS_OFFSET_ADDRESS
     #endif /* AVR32_USART_RXD_OFFSET_ADDRESS */
     #ifndef F_CPU
     #define F_CPU ((uint32_t)80000000)
     #else /* F_CPU */
     #define F_CPU F_CPU
     #endif /* F_CPU */
     #ifndef IOPORT_CREATE_BIT_MASK
     #define IOPORT_CREATE_BIT_MASK(x) ((uint16_t)(~((uint16_t)((x)-1)))
     #else /* IOPORT_CREATE_BIT_MASK */
     #define IOPORT_CREATE_BIT_MASK(x) IOPORT_CREATE_BIT_MASK(x)
     #endif /* IOPORT_CREATE_BIT_MASK */
     #ifndef _BV
     #define _BV(x) ((uint8_t)(1 << (x)))
     #else /* _BV */
     #define _BV(x) _BV(x)
     #endif /* _BV */

     },

     {

     .tcc_ioport = PIN_PC14 | PIN_PC15 ,
     .tcc_mux = ATMEL_ATMega644P_MUX_A ,
     .tcc_ioport_mask = ATMEL_ATMega644P_PINMASK( PC ) ,
     .tcc_ioport_index = ATMEL_ATMega644P_PORTC_INDEX ,
     .tcc_pinmask = ATMEL_ATMega644P_PINMASK( PC14 ) | ATMEL_ATMega644P_PINMASK( PC15 ),
     .tcc_pin = { AT91C_PIO_PC14I_ETK_bm , AT91C_PIO_PC15I_ETK_bm } ,

     }
     };

     struct tcds_config g_pwm_config[ PWM_CONFIG_COUNT ] =
     {

     };

     struct tc_config g_tc_config[TC_COUNT] =
     {

     };

     struct timer_counter_config g_tc_counter_config[TIMER_COUNTER_COUNT] =
     {

     };

     struct atm_data_descriptor g_gptmr_desc[ GPTMR_COUNT ] =
     {

     };

     struct atm_data_descriptor g_smmr_desc[ SMMR_COUNT ] =
     {

     };
     /* this structure defines all registers associated with each timer-counter instance */

     const struct timer_counter_register g_timers_registers[ TIMER_COUNTER_INSTANCE_COUNT ][ TIMER_COUNTER_REGISTER_COUNT ] =
     {

     };

     /* this structure defines all registers associated with each generic timer instance */

     const struct generic_timer_register g_gptmr_registers[ GPTMR_INSTANCE_COUNT ][ GPTMR_REGISTER_COUNT ] =
     {

     };

     /* this structure defines all registers associated with each special mode register instance */

     const struct special_mode_register g_smmr_registers[ SMMR_INSTANCE_COUNT ][ SMMR_REGISTER_COUNT ] =
     {

     };
     /* this structure maps each pin/port/pin mask combination used by each timer-counter instance */

     const struct timer_counter_port_pinmap * const g_timers_port_pinmap_array_ptr[ TIMER_COUNTER_INSTANCE_COUNT ] =
     {

     };
     /* this structure maps each pin/port/pin mask combination used by each generic timer instance */

     const struct generic_timer_port_pinmap * const g_gptmr_port_pinmap_array_ptr[ GPTMR_INSTANCE_COUNT ] =
     {

     };
     /* this structure maps each pin/port/pin mask combination used by each special mode register instance */

     const struct special_mode_port_pinmap * const g_smmr_port_pinmap_array_ptr[ SMMR_INSTANCE_COUNT ] =
     {

     };
     /* this structure contains all configuration information regarding timers-counters instances */

     const struct timer_counter_config * const g_timers_config_array_ptr[ TIMER_COUNTER_INSTANCE_COUNT + 1 ] =
     {

     };
     /* this structure contains all configuration information regarding generic-timers instances */

     const struct generic_timer_config * const g_gptmr_config_array_ptr[ GPTMR_INSTANCE_COUNT + 1 ] =
     {

     };
     /* this structure contains all configuration information regarding special-mode-registers instances */

     const struct special_mode_config * const g_smmr_config_array_ptr[ SMMR_INSTANCE_COUNT + 1 ] =
     {

     };
     #if defined(__DOXYGEN__)
     /*
     @page avr8-timer-counter-tc Timer Counter – Timer Counter Mode

     The Timer Counter module provides an accurate time base generator which can be used for both timing events as well as counting external events.
     It also provides capture-compare functionality which allows it to generate precise output waveforms.
     The Timer Counter module consists of three main submodules:
     @par The Time Base Generator submodule:
     This submodule generates an accurate time base signal which may be used either as an input clock source for other peripherals such as UARTs or SPI modules or may be directly connected to an output port pin.
     It also provides overflow interrupts which may be used for timing events.
     @par The Capture Compare submodule:
     This submodule allows external events such as pulses from an encoder wheel or edges from an external clock source to be counted by capturing them onto one of four internal counters.
     Each counter may trigger its own interrupt when it reaches its specified value.
     Additionally these counters may be used as compare registers which will cause an interrupt when matched by the time base counter.
     Finally these counters may also be used directly as outputs providing precise PWM signals whose duty cycle is controlled by writing values into these compare registers.
     @par The Output Compare Control submodule:
     This submodule allows individual control over how each compare register affects its corresponding output port pin allowing independent control over polarity inversion level-shifting etc..
     In addition there are two additional control bits which allow complete control over how interrupts generated from both overflow events from thtime base generatorand capturecompareeventsfromtheinternalcountersarehandledbytheinterruptcontrollermoduleoftheMCU.Thesecontrolbitsallowindividualcontroloverwhetheraninterruptisgeneratedwhenanoverfloworcapturecompareeventoccursandwhethertheseinterruptscanbeenableddisabledbysoftwareoriftheymustalwaysremainenabledregardlessoftheenablebitintherelevantinterruptvectorregister.Thefollowingdiagramillustratestheinterconnectionsofthesesubmoduleswithinatimercountermodule:

     @image html avr8-timer-counter-tc-diagram.png "Timer Counter Module Diagram"
     */
     #elif defined(__DOXYGEN_INV__)
     #error Do not include doxygen inv tag here!
     #elif !defined(__DOXYGEN__)
     #warning Do not include non-doxygen tag here!
     #else // defined(__DOXYGEN__)
     #warning Do not include doxygen tag here!
     #warning Use doxygen inv tag instead!
     #warning Use doxygen non-tag instead!
     #warning Include header file containing doxygen tags instead!
     #warning Do not include header file containing doxygen tags directly!
     #warning Include doxygen.h header file instead!
     #include "doxygen.h"
     #include "doxygen-tc.h"
     #include "doxygen-gptmr.h"
     #include "doxygen-smmr.h"
     #include "doxygen-mux.h"
     #include "doxygen-ioports.h"
     #include "doxygen-timers.h"
     #include "doxygen-gptmr.h"
     #include "doxygen-smmr.h"
     #include "doxygen-mux.h"
     #include "doxygen-ioports.h"

     void tcd_init(void);
     void tcd_start(void);
     void tcd_stop(void);
     void tcd_reset(void);
     void tcd_enable_interrupts(uint8_t intflags);
     void tcd_disable_interrupts(uint8_t intflags);

     ISR(TCD_OVF_vect);
     ISR(TCD_CMP_vect);

     ISR(TCD_OVF_vect){
     if(g_timers_counters[g_current_tc].intenable & TIM_INTFLAG_OVF){
     g_timers_counters[g_current_tc].intflags |= TIM_INTFLAG_OVF ;
     TIM_INTFLAGS(g_current_tc)=TIM_INTFLAG_OVF ;
     }
     }
     ISR(TCD_CMP_vect){
     if(g_timers_counters[g_current_tc].intenable & TIM_INTFLAG_MATCH){
     g_timers_counters[g_current_tc].intflags |= TIM_INTFLAG_MATCH ;
     TIM_INTFLAGS(g_current_tc)=TIM_INTFLAG_MATCH ;
     }
     }
     //this function initializes the selected timer-counter instance according toitsconfigurationdatastructure.Itsetsallthehardwareregistersaccordingtotheconfigurationdatastructure.Italsosetsallsoftwarevariablesassociatedwiththisinstancetotheirdefaultvalues.Ifnosuchinstanceisselectednoactionistakenandnoneofthesevariablesismodified.

     //thisfunctionstartsoperationoftheselctedtimercounterinstanceaccordingtoitsconfigurationdatastructure.Itenablesallrequiredinterruptssetsupoutputpinandenablesspecificfeaturesaccordingtoitsconfigurationdatastructure.Ifnoinstanceisselectednoactionistakenandnoneofthesevariablesismodified.

     //thisfunctionstopsoperationoftheselctedtimercounterinstanceaccordingtoitsconfigurationdatastructure.Itdisablesallrequiredinterruptssetsupoutputpinanddisablesspecificfeaturesaccordingtoitsconfigurationdatastructure.Ifnoinstanceisselectednoactionistakenandnoneofthesevariablesismodified.

     //thisfunctionresetsoperationoftheselctedtimercounterinstanceaccordingtoitsconfigurationdatastructure.Itresetsallrequiredhardwareregisterssetsuptoitsdefaultvalues.Italsoresetsallsoftwarevariablesassociatedwiththisinstance.Ifnosuchinstanceisselectednoactionistakenandnoneofthesevariablesismodified.

     //thisfunctionenables/disabledspecificinterruptsourcesassociatedwiththeselctedtimercounterinstanceaccordingtothevaluepassedastheparameter.Iftheparameterhasvalueequaltomaskthenenabledspecifiedinterruptsourcesotherwisedisablesthem.Ifnosuchinstanceisselectednoactionistakenandnoneofthesevariablesismodified.

     #if defined(__DOXYGEN__)
     /*
     @page avr8-timer-counter-gptmr Generic Timer – Generic Timer Mode

     The Generic Timer module provides an accurate time base generator which can be used for both timing events as well as counting external events.
     It also provides capture-compare functionality which allows it to generate precise output waveforms.
     The Generic Timer module consists of three main submodules:
     @par The Time Base Generator submodule:
     This submodule generates an accurate time base signal which may be used either as an input clock source for other peripherals such as UARTs or SPI modules or may be directly connected to an output port pin.
     It also provides overflow interrupts which may be used for timing events.
     @par The Capture Compare submodule:
     This submodule allows external events such as pulses from an encoder wheel or edges from an external clock source to be counted by capturing them onto one of four internal counters.
     Each counter may trigger its own interrupt when it reaches its specified value.
     Additionally these counters may be used as compare registers which will cause an interrupt when matched by the time base counter.
     Finally these counters may also be used directly as outputs providing precise PWM signals whose duty cycle is controlled by writing values into these compare registers.
     @par The Output Compare Control submodule:
     This submodule allows individual control over how each compare register affects its corresponding output port pin allowing independent control over polarity inversion level-shifting etc..
     In addition there are two additional control bits which allow complete control over how interrupts generated from both overflow events from thtime base generatorand capturecompareeventsfromtheinternalcountersarehandledbytheinterruptcontrollermoduleoftheMCU.Thesecontrolbitsallowindividualcontroloverwhetheraninterruptisgeneratedwhenanoverfloworcapturecompareeventoccursandwhethertheseinterruptscanbeenableddisabledbysoftwareoriftheymustalwaysremainenabledregardlessoftheenablebitintherelevantinterruptvectorregister.Thefollowingdiagramillustratestheinterconnectionsofthesesubmoduleswithinagenerictimermodule:

     @image html avr8-timer-counter-gptmr-diagram.png "Generic Timer Module Diagram"

     */
     #elif defined(__DOXYGEN_INV__)
     #error Do not include doxygen inv tag here!
     #elif !defined(__DOXYGEN__)
     #warning Do not include non-doxygen tag here!
     #else // defined(__DOXYGEN__)
     #warning Do not include doxygen tag here!
     #warning Use doxygen inv tag instead!
     #warning Use doxygen non-tag instead!
     #warning Include header file containing doxygen tags instead!
     #warning Do not include header file containing doxygen tags directly!
     #warning Include doxygen.h header file instead!
     #include "doxygen.h"
     #include "doxygen-tc.h"
     #include "doxygen-gptmr.h"
     #include "doxygen-smmr.h"
     #include "doxygen-mux.h"
     #include "doxygen-ioports.h"

     void gpmt_init(void);
     void gpmt_start(void);
     void gpmt_stop(void);
     void gpmt_reset(void);
     void gpmt_enable_interrupts(uint8_t intflags);
     void gpmt_disable_interrupts(uint8_t intflags);

     ISR(GPTMR_OVF_vect);
     ISR(GPTMR_CMP_vect);

     ISR(GPTMR_OVF_vect){
     if(g_generic_timers[g_current_gpmt].intenable & GPMT_INTFLAG_OVF){
     g_generic_timers[g_current_gpmt].intflags |= GPMT_INTFLAG_OVF ;
     GPTMR_INTFLAGS(g_current_gpmt)=GPMT_INTFLAG_OVF ;
     }
     }
     ISR(GPTMR_CMP_vect){
     if(g_generic_timers[g_current_gpmt].intenable & GPMT_INTFLAG_MATCH){
     g_generic_timers[g_current_gpmt].intflags |= GPMT_INTFLAG_MATCH ;
     GPTMR_INTFLAGS(g_current_gpmt)=GPMT_INTFLAG_MATCH ;
     }
     }

     //thisfunctioninitializesagenerictimeraccordingtogiventimercfgdatadatastructure.Itsetsalltherequiredhardwareregistersaswellasinitiatesoftwarevariablesassociatedwiththatgenerictimer.Ifnogenerictimercfgdatadatastructureexistsnofurtheractionismade.

     //thisfunctionstartsoperationofagivengenerictimerwhichwasinitializedusinggpmt_init()function.Givengenerictimerwillstartworkingacordingtogiventimercfgdatadatastructure.Ifnovalidgenerictimercfgdatadatastructuresexistnofurtheractionismade.

     //thisfunctionstopsoperationofagivengenerictimerwhichwasinitializedusinggpmt_init()function.Givengenerictimewillstopworkingacordingtogiventimercfgdatadatastructure.Ifnovalidgenerictimercfgdatadatastructuresexistnofurtheractionismade.

     //thisfunctionresetsoperationofagivengenerictimerwhichwasinitializedusinggpmt_init()function.Givengenerictimewillresetworkingacordingtogiventimercfgdatadatastructure.Ifnovalidgenerictimercfgdatadatastructuresexistnofurtheractionismade.

     //thisfunctionenables/disabledspecificinterruptsourcesassociatedwithagivengenerictimerwhichwasinitializedusinggpmt_init()function.Accordingtogiventimercfgdatadatastructurespecificirqsourceswillbedischarged.Ifnogenerictimercfgdatadatastructureexistsnofurtheractionismade.

     #if defined(__DOXYGEN__)
     /*
     @page avr8-timer-counter-smmr Special Mode Register

     Special Mode Registers provide several functionalities depending upon what mode it is configured into.Theycanbeconfiguredintooneofthreeoperatingmodes:Normalmode,PWMmode,andDualcomparatormode.Innormalmodeitfunctionsasacommoninput/outputregisterwhereusercanreadwritearbitraryvalueintoit.InPWMmodeitgeneratesprecisePWMwaveformwhosedutycyclecanberegulatedbywritingvalueintoit.InDualcomparatormodetheSMRservesasacouplingpointbetweentwocapturecompareunits.Theresultissuchthatbothcapturecompareunitsusecommontimebasebuthaveindependentcomparevalues.Thisisusefulwhentwoindividualeventswithdifferentfrequencyratesneedtosynchronizewitheachother.Forexample,thisfeaturecanbeusedforcontrollingmultiplesteppermotorswhereeachsteppermotorneedstobecontrolledatdifferentfrequencyratesbutstillneedstobesynchronizedamongthemself.WhenconfiguredintoPWMmodetheSMRservesasacommonreferencepointforbothcapturecompareunitssothattheysharecommontimebase.Thisfeatureallowsbothcapturecompareunitsworksimultaneouslyonsameperiodicintervalbutoperateondifferentdutycycles.Similarly,inDualcomparatormodebothcapturecompareunitssharecommontimebasebutoperateondifferentcomparevalues.SpecialModeRegistersareconfiguredviaSMCTRLregisterwherevariousbitsrepresentdifferentmodesalongwiththeircorrespondingspecialfeatures.ThereareseveralspecialfeaturesavailabledependinguponwhichmodeSMRsaresetinto.Pertinentinformationregardingavailablespecialfeaturesforeachmodeisincludedbelow:

     NormalMode:

     Noadditionalfeaturesprovided

     PWMMode:

     InPWMmodetheSMRservesasacommonreferencepointforbothcapturecompareunitssothattheysharecommontimebase.Thisfeatureallowsbothcapturecompareunitsworksimultaneouslyonsameperiodicintervalbutoperateondifferentdutycycles.

     DualComparatorMode:

     InDualcomparatormodetheSMRservesasacommonreferencepointforbothcapturecompareunitssothattheysharecommontimebase.Thisfeatureallowsbothcapturecompareunitsworksimultaneouslyonsameperiodicintervalbutoperateondifferentdutycycles.

     */
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     /*!
     * @brief Special mode register initialization function prototype declaration statement
     *
     * @details This function initializes special mode register according given smmr_cfg_data structure.It sets up all hardware registers associated with selected smmr instance according given smmr_cfg_data structure.It also resets software variables associated with selected smmr instance back tot o default values.If no valid smmr_cfg_data exists no further action is taken.*/
     void smmr_init();
     /*!
     * @brief Special mode register start operation function prototype declaration statement
     *
     * @details This function starts operation of given special mode register according given smmr_cfg_data structure.It enables required interrupts sets up output pins disables specific features according given smmr_cfg_data structures.If no valid smmr_cfg_data exists no further action is taken.*/
     void smmr_start();
     /*!
     * @brief Special mode register stop operation function prototype declaration statement
     *
     * @details This function stops operation of given special mode register according given smmr_cfg_data structure.It disables required interrupts sets up output pins enables specific features according given smmr_cfg_data structures.If no valid smmr_cfg_data exists no further action is taken.*/
     void smmr_stop();
     /*!
     * @brief Special mode register reset operation function prototype declaration statement
     *
     * @details This function resets operation of given special mode register according given smmr_cfg_data structure.It resets hardware registers associated with selected sm mr instance back tot o default values.It also resets software variables associated with selected s m mr instance back tot o default values.If no valid s mm r c f g d ata exists n o f u r t h e r ac tion i s ta k en.*/
     void smmr_reset();
     /*!
     * @brief Special mode register enable/disable interrupts function prototype declaration statement
     *
     * @details This function enables/disabled specific interrupt sources associated with given special mode registe r wh ich was initialized using s m m r _ init () f u n c tion.Accordinggivensm mr_c f gd ata specificirqsourceswillbedischarged.Ifnovalidsm mr_c f gd ataexistsn o fur ther ac tion i s ta k en.*/
     void s mm r_enable_interrups ts(u int8_t intflags );
     /*!
     *@brief Special Mode Register Interrupt Service Routine Declaration Statement
     *
     *@details This ISR routine handles interrupt sources generated due any SM MR related activity*/
     ISR(SMMR_OV F_vect );
     ISR(SMM R_CM P_v e c t );

     ISR(SMM R_CM P_v e c t ){
     if(s m m rs [ s m m rs_i nd ex ].i n e n ab le & S M M R_I N TF A L G_M A T C H ){
     s m m rs [ s m m rs_i nd ex ].i n f l ag s |= S M M R_I N TF A L G_M A T C H ;S MM R_I N TF F L AGS(s mm rs_i ndex)=S M M R_I N TF A L G_M A T C H ;}
     }
     ISR(S MM R OV F_v ect ){
     if(s mmrs[s mmrs_index].intenable&SMMR_INTEGRALG.O VF){
     s mmrs[s mmrs_index].intflags|=SMM_R_INTEGRA LG.O VF;S MM_R INTFLAGS(s mmrs_index)=S MM_R_INTEGRA LG.O VF;}
     }

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